{ ===================================================== }
{    74LP155                                            }
{ ===================================================== }
logicname 74LP155

{ ----------------------------------------------------- }
{    手続き譜                                           }
{ ----------------------------------------------------- }
procedure dec2to4
input  NG;
input  PG;
input  D[2];
output Y[4];
bitn   y[4];

   if (!NG&PG)
      switch(D)
         case 0:  y=0b0001;
         case 1:  y=0b0010;
         case 2:  y=0b0100;
         case 3:  y=0b1000;
      endswitch
   else
      y=0;
   endif

   Y=!y;

endp

{ ----------------------------------------------------- }
{    実効譜                                             }
{ ----------------------------------------------------- }
entity TTL
input  NGA,PGA;
input  NGB,PGB;
input  DA[2];
input  DB[2];
output YA[4];
output YB[4];

   YA=dec2to4(NGA,PGA,DA);
   YB=dec2to4(NGB,PGB,DB);

ende

{ ----------------------------------------------------- }
{    機能実行譜                                         }
{ ----------------------------------------------------- }
entity sim
output NGA,PGA;
output NGB,PGB;
output DA[2];
output DB[2];
output YA[4];
output YB[4];
bitr   tc[4];

   part TTL(NGA,PGA,NGB,PGB,DA,DB,YA,YB)

   tc=tc+1;

   DA=tc.0:1;
   DB=tc.0:1;
   PGA=!tc.2;
   PGB=tc.2;

   if (tc>8)
      NGA=1;
      NGB=1;
   else
      NGA=0;
      NGB=0;
   endif
ende

endlogic