{ ===================================================== }
{    74LP368                                            }
{ ===================================================== }
logicname 74LP368

{ ----------------------------------------------------- }
{    ŽÀŒø•ˆ                                             }
{ ----------------------------------------------------- }
entity TTL
input  G1,G2;
input  DA[3],DB[3];
inout  QA[3],QB[3];
bitn   iqa[3],oqa[3],cqa;
bitn   iqb[3],oqb[3],cqb;

   enable(QA,iqa,oqa,cqa)
   enable(QB,iqb,oqb,cqb)

   oqa=!DA;
   oqb=!DB;

   cqa=!G1;
   cqb=!G2;

ende

endlogic